SML2108
PRELIMINARY
Symbol
Parameter
Conditions
VDD
Supply voltage
Maximum bias and modulation
current
ID
Supply current
Bias and modulation current out-
puts open
ILO
Input leakage current VIN = 0V to VDD
ILI
Output leakage current VOUT = 0V to VDD
VOL
Output low voltage
IOL = 2mA
VOH
Output high voltage
VDD = 5V, IOL = –400µA
VDD < 4.5V, IOL = –100µA
VIL
Input low voltage
VIH
Input high voltage
fINT
Integrator loop
frequency
tPUS
Power up stabilization Integrator time constant is less
time
than 10ms
Analog Inputs
DETECT DETECT input to ADC
IEXT TEMP Full scale current input
Analog Outputs
IMODN
N-channel modulation
current
IMODP
P-channel modulation
current
IBIASN
N-channel bias current
IBIASP
P-channel bias current
VDAC
10-Bit DAC output
Digital Outputs
ALERT ALERT output
Open drain ALERT output is
active
Min.
3
2.4
VDD – 0.2
–0.1
0.7 × VDD
0
0
0
0
0
0
Typ.
Max.
5.5
Units
V
2
mA
1
µA
10
µA
0.4
V
V
V
0.3 × VDD
V
0.5
V
1
kHz
10
ms
1.5
V
390.6
µA
–100
mA
100
mA
–100
mA
100
mA
1.5
V
5
mA
2053 Elect Table B
2053 2.2 11/07/00
SUMMIT MICROELECTRONICS, Inc.
6