M45PE10
DC and AC parameters
Table 14.
AC characteristics (50 MHz operation)
50 MHz operation for T9HX technology(1)
Test conditions specified in Table 8 and Table 9
Symbol Alt.
Parameter
Min.
Typ.
Max. Unit
Clock frequency for the following instructions:
fC
fC FAST_READ, PW, PP, PE, SE, DP, RDP,
D.C.
WREN, WRDI, RDSR, RDID
fR
Clock frequency for read instructions
D.C.
tCH(2) tCLH Clock High time
9
tCL(2) tCLL Clock Low time
9
Clock slew rate(3) (peak to peak)
0.1
tSLCH tCSS S active setup time (relative to C)
5
tCHSL
S not active hold time (relative to C)
5
tDVCH tDSU Data in setup time
2
tCHDX tDH Data in hold time
5
tCHSH
S active hold time (relative to C)
5
tSHCH
S not active setup time (relative to C)
5
tSHSL tCSH S deselect time
100
tSHQZ(3) tDIS Output disable time
tCLQV
tV Clock Low to Output valid
tCLQX tHO Output hold time
0
tWHSL
Write protect setup time
50
tSHWL
Write protect hold time
100
tDP(3)
S to deep power-down
tRDP(3)
S High to standby mode
tRLRH(3) tRST Reset pulse width
tRHSL tREC Reset recovery time
tSHRH
Chip should have been deselected before
Reset is de-asserted
tPW(4)
Page write cycle time (256 bytes)
tPP(4)
Page program cycle time (256 bytes)
Page program cycle time (n bytes)
11
0.8
int(n/8) × 0.025
50 MHz
33 MHz
ns
ns
V/ns
ns
ns
ns
ns
ns
ns
ns
8
ns
8
ns
ns
ns
ns
3
µs
30
µs
10
µs
3
µs
10
ns
23 ms
3
ms
tPE
Page erase cycle time
10
20 ms
tSE
Sector erase cycle time
1.5
5
s
1. Delivery of parts in T9HX process to start from August 2007.
2. tCH + tCL must be greater than or equal to 1/ fC.
3. Value guaranteed by characterization, not 100% tested in production.
4. n = number of bytes to program. int(A) corresponds to the upper integer part of A. Examples: int(1/8) = 1, int(16/8) = 2,
int(17/8) = 3.
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