CS7654
Jump Control 1 (41h at SA 0x34h)
7
JMP7
6
JMP6
5
JMP5
4
3
JMP4
JMP3
R/W
2
JMP2
1
JMP1
0
JPM0
This register contains the 8 LSBs of the EEPROM start address used when the JUMP bit is set (bit 2 register 42h
at SA 0x34h).
EEPROM Control (42h at SA 0x34h)
7
6
5
4
3
2
1
0
res
res
res
res
res
JUMP
SKIP
HALT
R/W
State machine commands for loading EEPROM data after reset. (see extended EPROM configuration)
HALT
Writing a 1 to this bit stops the reading of EEPROM data.
SKIP
Writing a 1 to this bit forces the next EEPROM read cycle to occur at the address held in the
Configuration Control (n) register, where "n" is the value held in the Configuration Index Regis-
ter (43h at SA 0x34h)
JUMP
Writing a 1 to this bit forces the next EEPROM access to occur at the address held in registers
40h and 41h at SA 0x34h .
Configuration Index Register (43h at SA 0x34h)
7
6
5
4
3
2
1
0
res
res
res
res
res
SW2
SW1
SW0
Reserved
R/W
This contains the DIP switch status at reset. (see extended EPROM configuration) The value of this register selects
the appropriate Configuration register when the SKIP command is executed.
Reserved Registers (44h - FEh at SA 0x34h)
These registers are reserved and return a value of 00h when read.
Station Address Register (FFh at SA 0x34h)
7
6
5
4
3
2
1
0
res
SA6
SA5
SA4
SA3
SA2
SA1
SA0
Reserved
R/W
CS7654 station address of the color processor, 7 MSBs (the LSB of the complete 8-bit station address is determined
by the LSB which acts as a read/write direction bit).
52