
STV0674
4.4 NAND flash interface
4.4.1 Command latch cycle for NAND flash interface
Figure 5: Command latch cycle
CLE
CE_n
WE_n
ALE
IO[7:0]
tCLS
tCLH
tWP
tALS
tALH
tDS
tDH
Command
Detailed Specifications
4.4.2 Address Latch Cycle for NAND Flash Interface
Figure 6: Address latch cycle
CLE
CE_n
WE_n
ALE
IO[0:7]
tCLS
tWC
tWP
tWH
tDS tDH
A0-A7
A9-A16
tALH
A17-A21
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