STTS2002(2011) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STTS2002 Datasheet PDF : 52 Pages
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SPD EEPROM operation
STTS2002
Table 24. Operating modes
Mode
RW bit
Current address read
1
0
Random address read
1
Sequential read
1
Byte write
0
Page write
0
TS write
0
TS read
1
Bytes
1
1
≥1
1
≤ 16
2
2
Initial sequence
START, device select, RW = 1
START, device select, RW = 0, address
reSTART, device select, RW = 1
Similar to current or random address read
START, device select, RW = 0
START, device select, RW = 0
START, device select, R/W = 0, pointer data, stop
START, device select, R/W = 1, pointer data, stop
5.4
Software write protect
Software write-protection allows the bottom half of the memory area (addresses 00h to 7Fh)
to be temporarily or permanently write protected.
Software write-protection is handled by three instructions:
● SWP: set write protection
● CWP: clear write protection
● PSWP: permanently set write protection
The level of write-protection (set or cleared) that has been defined using these instructions,
remains defined even after a power cycle.
Figure 10. Result of setting the write protection
Memory
Area
FFh
Standard
Array
80h
7Fh
Standard
Array
00h
Default EEPROM memory area
state before write access
to the Protect Register
FFh
Standard
Array
80h
7Fh
Write
Protected
Array
00h
State of the EEPROM memory
area after write access
to the Protect Register
AI01936c
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Doc ID 15389 Rev 5
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