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ST7FMC2N6B6(2004) View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST7FMC2N6B6 Datasheet PDF : 294 Pages
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ST7MC1/ST7MC2
CLOCK AND TIMING CHARACTERISTICS (Contd)
11.5.4 Clock Security System with PLL
Table 89. PLL Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
Fosc
PLL input frequency range
7
8
MHz
Output Frequency Output frequency when the PLL attain lock.
16
MHz
tLock
Jitter
fcpu
PLL Lock Time (LOCKED = 1)
Jitter in the output clock
CPU clock frequency when VCO is con-
nected to ground (ICD internal clock or
back up oscillator )
50
100
µs
2
%
3
MHz
Table 90. Clock Detector Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
fDetect
Detected Minimum Input Frequency
500 1)
KHz
tsetup
Time needed to detect OSCIN once CKD is
enabled
3
µs
thold
Time needed to detect that OSCIN stops
3
µs
Notes:
1. Data based on characterization results, not tested in production.
254/294

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