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ST7FMC2N6B6(2004) View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST7FMC2N6B6 Datasheet PDF : 294 Pages
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ST7MC1/ST7MC2
MOTOR CONTROLLER (Contd)
Depending on the frequency and the duty cycle of
the PWM signal, the delay inserted before sam-
pling could cause it sample the signal OFF time in-
stead of the ON time. In this case an interrupt can
be generated and the sample will not be taken into
acount. When a sample occurs outside the PWM
signal ON time, the SOI bit in the MCONF register
is set and an interrupt request is generated if the
SOM bit is set in the MCONF register. This inter-
rupt is enabled only if a delay value has been set in
the DS[3:0] bits. In this case, the sampling is done
at the PWM frequency but only during the ON time
of the PWM signal. Figure 82 and Figure 83 shows
in detail the generation of the sampling order when
the delay is added.
For complete flexibility, the possibility of sampling
at 1 MHz frequency during the ON time of the
PWM signal is also available when the SPLG bit is
set as if there is a delay value in the DS[3:0] bits.
This means that when the sampling is to be per-
formed, after the delay a 1 MHz sampling window
is opened until the next OFF time of the PWM sig-
nal. The Sampling Out interrupt will be generated if
the delay added is longer than the duty cycle of the
PWM signal. As the SPLG bit is set and a value
has been put in the DS[3:0] bits, no minimum off
time is required for the PWM signal and it is auto-
matically set to 0µs in current mode. A true 100%
duty cycle can be also set in the 12-bit Timer in
voltage mode. Figure 84 shows in detail the sam-
pling at 1 MHz during ON time.
Figure 82. Adding the Delay to sample during ON time for Z detection
TSampling
New
sample
PWM signal
DS[3:0]
DS[3:0]
PWM OFF
time
Current
sample
Figure 83. Sampling Out interrupt generation
TSampling
PWM signal
DS[3:0]
PWM OFF
time
Current
SO
sample
SO
To interrupt generator
New sample during next
OFF time. Sample not taken into
account. SO interrupt generated.
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