ST72324J2B5 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

MFG CO.

ST72324J2B5

8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE

STMicroelectronics 

ST72324

SUPPLY CURRENT CHARACTERISTICS (Cont’d)

12.4.3 RUN and SLOW Modes (ROM devices)

Symbol

Parameter

Supply current in RUN mode 2)

IDD

Supply current in SLOW mode 2)

Conditions

fOSC=2MHz, fCPU=1MHz

fOSC=4MHz, fCPU=2MHz

fOSC=8MHz, fCPU=4MHz

fOSC=16MHz, fCPU=8MHz

fOSC=2MHz, fCPU=62.5kHz

fOSC=4MHz, fCPU=125kHz

fOSC=8MHz, fCPU=250kHz

fOSC=16MHz, fCPU=500kHz

Typ Max 1) Unit

1.3

2.0

2.0

3.0

3.6

5.0

7.1 10.0

mA

0.6

1.8

0.7

2.1

0.8

2.4

1.1

3.0

12.4.4 WAIT and SLOW WAIT Modes (ROM devices)

Symbol

Parameter

Supply current in WAIT mode 2)

IDD

Supply current in SLOW WAIT mode 2)

Conditions

fOSC=2MHz, fCPU=1MHz

fOSC=4MHz, fCPU=2MHz

fOSC=8MHz, fCPU=4MHz

fOSC=16MHz, fCPU=8MHz

fOSC=2MHz, fCPU=62.5kHz

fOSC=4MHz, fCPU=125kHz

fOSC=8MHz, fCPU=250kHz

fOSC=16MHz, fCPU=500kHz

Typ Max 1) Unit

1.0

1.3

1.5

2.0

2.5

3.3

4.5

6.0

mA

0.07 0.2

0.1

0.3

0.2

0.6

0.35 1.2

Notes:

1. Data based on characterization results, tested in production at VDD max. and fCPU max.

2. Measurements are done in the following conditions:

- Progam executed from RAM, CPU running with RAM access. There is no increase in consumption if programs are ex-

ecuted in ROM

- All I/O pins in input mode with a static value at VDD or VSS (no load)

- All peripherals in reset state.

- CSS and LVD disabled.

- Clock input (OSC1) driven by external square wave.

- In SLOW and SLOW WAIT mode, fCPU is based on fOSC divided by 32.

To obtain the total current consumption of the device, add the clock source (Section 12.5.3 and Section 12.5.4) and the

peripheral power consumption (Section 12.4.7).

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