CS8427-IS View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS8427-IS Datasheet PDF : 59 Pages
| |||
CS8427
11.17 User Data Buffer Control (13h)
7
6
5
4
3
2
1
0
0
0
0
UD
UBM1
UBM0
DETUI
EFTUI
UD - User data pin (U) direction specifier If this bit is changed during normal operation, then always stop the CS8427
first (RUN = 0), write the new value, then start the CS8427 (RUN = 1).
Default = ‘0’
0 - The U pin is an input. The U data is latched in on both rising and falling edges of
OLRCK. This setting also chooses the U pin as the source for transmitted U data.
1 - The U pin is an output. The received U data is clocked out on both rising and falling edges
of ILRCK. This setting also chooses the U data buffer as the source of transmitted U data.
UBM1:0 - Sets the operating mode of the AES3 U bit manager
Default = ‘00’
00 - Transmit all zeros mode
01 - Block mode
10 - Reserved
11 - Reserved
DETUI - D to E U-data buffer transfer inhibit bit (valid in block mode only).
Default = ‘0’
0 - Allow U-data D to E buffer transfers
1 - Inhibit U-data D to E buffer transfers
EFTUI - E to F U-data buffer transfer inhibit bit (valid in block mode only).
Default = ‘0’
0 - Allow U-data E to F buffer transfers
1 - Inhibit U-data E to F buffer transfer
11.18 Q-Channel Subcode Bytes 0 to 9 (14h - 1Dh) (Read Only)
The following 10 registers contain the decoded Q-channel subcode data
7
CONTROL
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
6
CONTROL
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
5
CONTROL
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
4
CONTROL
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
3
ADDRESS
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
2
ADDRESS
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
1
ADDRESS
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
0
ADDRESS
TRACK
INDEX
MINUTE
SECOND
FRAME
ZERO
ABS MINUTE
ABS SECOND
ABS FRAME
Each byte is LSB first with respect to the 80 Q-subcode bits Q[79:0]. Thus bit 7 of address 14h is Q[0]
while bit 0 of address 14h is Q[7]. Similarly bit 0 of address 1Dh corresponds to Q[79].
DS477F1
37
Share Link: 