SC4524D
Applications Information (Cont.)
integrator pole (-90deg) and the dominant pole (-90deg).
The high frequency pole nulls the ESR zero and attenuates
high frequency noise.
60
where gm=0.3mA/V is the EA gain of the SC4524D.
Example: Determine the voltage compensator for an
800kHz, 12V to 3.3V/2A converter with 22uF ceramic
output capacitor.
30
Fz1
Fp1
0
Fp
COMPENSATOR GAIN
CONVERTER
Fc
GAIN
LOOP GAIN
-30
Fz Fsw/2
Choose a loop gain crossover frequency of 80kHz, and
place voltage compensator zero and pole at FZ1=16kHz
(20% of FC), and FP1=600kHz. From Equation (9), the
required compensator gain at FC is
AC
20
log¨¨©§
18.5
1
5.5
103
2ʌ
1
80 103
22 106
1.0
3.3
¸¸¹·
11.4dB
Then the compensator parameters are
-60
1K
10K
100K
1M
10M
AC
=
−F2R0EQ⋅UloENgCYG(HCz1A)R S
⋅1
2πFCC O
⋅ VFB
VO
11.4
R7
10 20
0.3 103
12.4k
Figure 8. Bode plots for voltage loop design
TthheerSeCfo45re2,4tDhecapnrobcAeeCsdu=umr−em2oa0frit⋅zhleoedgvao2sl:8ta⋅g6e.11lo⋅o1p0
−d3e⋅si2gπn ⋅
f8o0r
⋅
1
1
03
C5
⋅ 22 ⋅10 −6
C8
1
⋅ 213ʌ..0316 =10135.192d.4B103
1
2 ʌ 600 103 12.4 103
0.8nF
21pF
(f(1r12ue0))qn%PSuceltioariloeetnndctdht.cet2oh0cme%oponpeovnfeesrnttahRCelteoro75ogrs==pwgaia0c2intir.cπn,o2hi1,.s⋅8eAi01sn.oC⋅61cg.125voI0.9⋅n0efn1rrt−et0yf3rqrop31eu=liq⋅cet22uaon22lecfane..y13pec.kpdyA⋅ 1,lbtiFc0aFCac,3Ctk,ibo=fteinrn0taswdn.w4est5ifehtenhnerF
Select R7=12.4k, C5=1nF, and C8=22pF for the design.
Compensator parameters for various typical applications
are listed in Table 5. A MathCAD program is also available
ctheerarmeqicuoiruedtpcuotmcappCean8csi=atot2orsrπ,g⋅t6ahie0n0EaS⋅t1RF0Cz1e3cra⋅on2i2bs.en1ee⋅sg1tli0emc3tae=ted1da2bnpydF
upon request for detailed calculation of the compensator
parameters.
(2(340))%UPsloaefAAc tteCChh==eethcc−−eroo 22mcs00ospom⋅⋅ellvoonpeVVggse rocanf=trG2soea8C(rq1t1Aop⋅uR6+r eoS.nlsz11e⋅ce,/2⋅yrFG1ωo,πPPF0,p1FW 1,C)FC−.M(t31CZo(11,O⋅+c2ba+⋅snπeVsV/tcF⋅RwOωeB8ElenS0tQReh⋅Cn1+eO01sE)(103S29%R)/⋅ 2ωza2en2nr)⋅od1,
0
−6
Thermal Considerations
For the power transistor inside the SC4524D, the
cc⋅oir13nc..ud03iutPcl=otTiOso1Tsn5APL.lB9=oSTdsP, sBcCaPn+C,PbthSeWee+sswtiPmiBtScaThte+indPgaQlsofsosllPoSwW,s:and bootstrap
C O
FZ.
(5)
Then,
the
paramGPeWtMer≈s
15.9
R
GofCAth⋅ ReS
c,ompensaωtiop n≈
nRe1CtOw,ork
can
beRCc75al==cu02l.aπ2t1⋅e801d⋅612b0R⋅0y17−03=31=1⋅g022m22A2C0..
3k
1⋅
1
0
3
= 0.45nF
ωZ
=1,
PRC E=SRDC⋅OVCESAT
⋅ IO
PSW
=
1
2
⋅
tS
⋅ VIN
⋅IO
⋅ FSW
PQ = VIN ⋅ 2mA
(10)
C8
=
2
π⋅
60
C
0
5 = 12
⋅10 3
1
π⋅ 2FZ21.
R
1
7⋅ 1
0
3
= 12pF
PBST
=D⋅
VBST
⋅
IO
40
C8
=
1
2 πFP1
R7
Vo
Vc
=
(1
+
s
GPWM (1 +
/ ωp )(1 + s
sRESR CO)
/ ωn Q + s 2
/
ωn2 )
wherePVDBST=is(1th−eDB)S⋅TVsDu⋅pIpO ly voltage and tS is the equivalent
PIND = (1.1 ~ 1.3) ⋅ I2O ⋅ R DC
14