SC2449ISWTR View Datasheet(PDF) - Semtech Corporation

Part Name

Description

MFG CO.

SC2449ISWTR

BI-Phase/Dual Controller

Semtech Corporation 

SC2449

POWER MANAGEMENT

Control Loop Design (Cont.)

or

R

1

.

Fo

2

.

F x_over

.

Vo

G pwm.V in.G error F esr

F o V bg

when

F esr< F o< F x_over

(5) The compensation capacitor is determined by choos-

ing the compensator zero to be about one fifth of the

output filter corner frequency:

Fo

F zero 5

C

1

2 .π.R.F zero

(6) The final step is to generate the Bode plot, either by

using the simulation model in .ig. 1 or using the equa-

tions provided here with Mathcad. The phase margin

can then be checked using the Bode plot. Usually, this

design procedure ensures a healthy phase margin.

Step 1. Output filter corner frequency

.o = 1.453 KHz

Step 2. ESR zero frequency:

.esr = 2.653 KHz

Step 3. Check the following condition:

F

ers<

F

sw

5

Which is satisfied in this case.

Step 4. Choose crossover frequency and calculate

compensator R:

.x_over = 30 KHz

R = 5.89 KΩ

Step 5. Calculate the compensator C:

An example is given below to demonstrate the proce-

dure introduced above. The parameters of the power

supply are given as:

V in := 24 V

V o := 2.5 V

C = 92.98 n.

Step 6. Generate Bode plot and check the phase

margin. In this case, the phase margin is about 85°C

that ensures the loop stability. .ig. 2 shows the Bode

plot of the loop.

I o := 20 A

F sw := 150 KHz

L := 4 µH

C o := 3000 µF

R c := 0.02 Ω

R 1 := 1.5 KΩ

R 2 := 1.0 KΩ

 2002 Semtech Corp.

17

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