SC2449ISWTR View Datasheet(PDF) - Semtech Corporation

Part Name

Description

MFG CO.

SC2449ISWTR

BI-Phase/Dual Controller

Semtech Corporation 

SC2449

POWER MANAGEMENT

Control Loop Design

R2

R1

0

Gpwm

Error-Amp

-

Verror

Duty

L

The task here is to properly choose the compensation

network for a nicely shaped loop-gain Bode plot. The

following design procedures are recommended to accom-

plish the goal:

+

R

+

Vbg

-

C

0

0

Fig. 1. SC2449 control model.

+

Vin

-

0

Rc

Ro

Co

0

The control model of SC2449 can be depicted in .ig. 1.

This model can also be used in a Spice kind of simulator

to generate loop gain Bode plots. The bandgap refer-

ence is 1 V and trimmed to +/-1% accuracy. The de-

sired output voltage can be achieved by setting the re-

sistive divider network, R1 and R2.

The error amplifier is transconductance type with fixed

gain of:

..

G

..

error

..

A

0.002 ⋅

V

The compensation network includes a resistor and a ca-

pacitor in series, which terminates from the output of

the error amplifier to the ground.

(1) Calculate the corner frequency of the output filter:

.o

1

2.π. L .C o

(2) Calculate the ESR zero frequency of the output filter

capacitor:

. esr

1

2 .π.R c .C o

(3) Check that the ESR zero frequency is not too high.

.

.

e rs<

sw

5

If this condition is not met, the compensation structure

may not provide loop stability. The solution is to add

some electrolytic capacitors to the output capacitor bank

to correct the output filter corner frequency and the ESR

zero frequency. In some cases, the filter inductance may

also need to be adjusted to shift the filter corner fre-

quency. It is not recommended to use only high frequency

multi-layer ceramic capacitors for output filter.

This device uses voltage mode control with input voltage

feed forward. The peak-to-peak ramp voltage is propor-

tional to the input voltage, which results in an excellent

performance to reject input voltage variation. The PWM

gain is inversion of the ramp amplitude, and this gain is

given by:

1

G pwm V ramp

where the ramp amplitude (peak-to-peak) is 3 volts when

input voltage is 24 volts.

The total control loop-gain can then be derived as fol-

lows:

T( s)

T o.

1 s.R.C

s. R. C

.

1

1 s.R c.C o

s. R c.C o

L

Ro

s2.L.C o. 1

Rc

Ro

(4) Choose the loop gain cross over frequency (0 dB fre-

quency). It is recommended that the crossover frequency

is always less than one fifth of the switching frequency

or the output ripple frequency in bi-phase mode

operation:

.x_over

. sw

5

If the transient specification is not stringent, it is better

to choose a crossover frequency that is less than one

tenth of the switching frequency for good noise immu-

nity. The resistor in the compensation network can then

be calculated as:

R

1

.

F esr

2

.

F x_over

.

Vo

G pwm.V in.G error F o

F esr V bg

when:

. o < . esr< . x_over

where

To

..

G

..

error.V in.G

pwm .R .

R

R

1

2

R2

 2002 Semtech Corp.

16

www.semtech.com

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