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PCA8538UG(2014) View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
PCA8538UG
(Rev.:2014)
NXP
NXP Semiconductors. 
PCA8538UG Datasheet PDF : 107 Pages
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NXP Semiconductors
PCA8538
Automotive 102 x 9 Chip-On-Glass LCD segment driver
14.2 I2C-bus timing characteristics
Table 54. I2C-bus timing characteristic
VDD1, VDD2, VDD3 = 2.5 V to 5.5 V; VSS1 = 0 V; VLCD = 4.0 V to 12.0 V; Tamb = 40 C to +105 C; unless otherwise specified.
All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to VIL and
VIH with an input voltage swing of VSS1 to VDD1.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
fSCL
SCL frequency
tBUF
bus free time between a
STOP and START
condition
-
-
1.3
-
400
kHz
-
s
tHD;STA
hold time (repeated)
START condition
0.6
-
-
s
tSU;STA
set-up time for a repeated
START condition
0.6
-
-
s
tVD;DAT
tVD;ACK
data valid time
data valid acknowledge
time
[1] -
-
0.9
s
[2] -
-
0.9
s
tLOW
LOW period of the SCL
clock
1.3
-
-
s
tHIGH
HIGH period of the SCL
clock
0.6
-
-
s
tf
fall time
of both SDA and SCL
signals
-
-
0.3
s
tr
rise time
of both SDA and SCL
signals
-
-
0.3
s
tSU;DAT
tHD;DAT
tSU;STO
data set-up time
data hold time
set-up time for STOP
condition
100
-
-
ns
0
-
-
ns
0.6
-
-
s
tw(spike)
spike pulse width
-
-
50
ns
[1] tVD;DAT = minimum time for valid SDA output following SCL LOW.
[2] tVD;ACK = time for acknowledgement signal from SCL LOW to SDA output LOW.
PCA8538
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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