NXP Semiconductors
PCA8538
Automotive 102 x 9 Chip-On-Glass LCD segment driver
Table 9. SYNC1_pin - SYNC1 pin configuration command bit description
This command has no effect if the PCA8538 is a slave in a cascade.
Bit
Symbol
Value
Description
-
R/W
0
fixed value
-
RS[1:0]
00
fixed value
7 to 1 -
1011100
fixed value
0
OE
SYNC1 pin configuration
0[1]
pin SYNC1 is an output;
gated to 0 V;
to be used when PCA8538 is a single chip
1
pin SYNC1 is an output;
providing the synchronization signal;
to be used when PCA8538 is a master in a
cascade
[1] Default value.
8.2.5 Command: Clock-out-ctrl
When pin CLK is configured as an output pin, the Clock-out-ctrl command enables or
disables the clock output on pin CLK (Section 8.6.1 on page 19).
Table 10. Clock-out-ctrl - CLK pin input/output switch command bit description
Bit
Symbol
Value
Description
-
R/W
0
fixed value
-
RS[1:0]
00
fixed value
7 to 1 -
1101 010
fixed value
0
COE
control pin CLK
0[1]
clock signal not available on pin CLK;
pin CLK is in 3-state
1
clock signal available on pin CLK
[1] Default value.
PCA8538
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 26 September 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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