PCA8538UG(2014) View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

MFG CO.

PCA8538UG
(Rev.:2014)

Automotive 102 x 9 Chip-On-Glass LCD segment driver

NXP Semiconductors. 

NXP Semiconductors

PCA8538

Automotive 102 x 9 Chip-On-Glass LCD segment driver

8.2 General control commands

8.2.1 Command: Initialize

This command generates a chip-wide reset by setting all commands to their default

values. For further information, see Section 8.8 on page 23.

Table 6. Initialize command bit description

Bit

Symbol

Value

Description

-

R/W

0

fixed value

-

RS[1:0]

00

fixed value

7 to 0 -

00111010

fixed value

8.2.2 Command: OTP-refresh

Each IC is calibrated during production and testing of the device in order to achieve the

specified accuracy of the VLCD, the frame frequency, and the temperature measurement.

This calibration is performed on EPROM cells called One Time Programmable (OTP)

cells. These cells are read by the device after a reset and every time when the Initialize

command or the OTP-refresh command is sent. This command takes approximately

10 ms to finish.

Table 7. OTP-refresh - OTP-refresh command bit description

Bit

Symbol

Value

Description

-

R/W

0

fixed value

-

RS[1:0]

00

fixed value

7 to 0 -

11011000

fixed value

8.2.3 Command: Device-address

The Device-address command allows setting the address of the device in a cascaded

configuration and corresponds with pins A0 and A1 (see Section 15.2 on page 85).

Table 8. Device-address - device address command bit description

Bit

Symbol

Value

Description

-

R/W

0

fixed value

-

RS[1:0]

00

fixed value

7 to 2 -

000110

fixed value

1 to 0 A[1:0]

set address

00[1]

master

01

slave 1

10

slave 2

11

slave 3

[1] Default value.

8.2.4 Command: SYNC1_pin

With the SYNC1_pin command, the SYNC1 pin can be configured for using the PCA8538

as a single chip or a master in a cascade. If the PCA8538 is a slave in a cascade, the

command has no effect.

PCA8538

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 26 September 2014

© NXP Semiconductors N.V. 2014. All rights reserved.

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