512 Kbit Page-Mode EEPROM
SST29EE512 / SST29LE512 / SST29VE512
Data Sheet
ADDRESS A15-0
CE#
OE#
WE#
DQ 7-0
Three-Byte Sequence for
Enabling SDP
5555 2AAA 5555
TAH
TAS
TCP
TBLC
TOES
TOEH
TCS
TCH
AA 55
A0
SW0 SW1 SW2
DATA VALID
TDH
TDS
BYTE 0
BYTE 1
FIGURE 6: CE# CONTROLLED PAGE-WRITE CYCLE TIMING DIAGRAM
TBLCO
BYTE 127
TWC
301 ILL F05.1
ADDRESS A15-0
CE#
OE#
WE#
DQ 7
TCE
TOEH
TOE
D
D#
D#
TWC + TBLCO
FIGURE 7: DATA# POLLING TIMING DIAGRAM
©2001 Silicon Storage Technology, Inc.
13
TOES
D
301 ILL F06.0
S71060-06-000 6/01 301