M25PE80-VMN6TP View Datasheet(PDF) - Numonyx -> Micron
Part Name
Description
MFG CO.
M25PE80-VMN6TP
Numonyx -> Micron
M25PE80-VMN6TP Datasheet PDF : 66 Pages
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M25PE80
Instructions
Table 6. Instruction set
Instruction
Description
One-byte instruction Address Dummy Data
code
bytes bytes bytes
WREN Write enable
0000 0110 06h
0
WRDI Write disable
0000 0100 04h
0
RDID Read identification
1001 1111 9Fh
0
RDSR Read status register
0000 0101 05h
0
WRLR
WRSR(1)
Write to lock register
Write status register
1110 0101 E5h
3
0000 0001 01h
0
RDLR Read lock register
1110 1000 E8h
3
READ Read data bytes
0000 0011 03h
3
FAST_READ
Read data bytes at higher
speed
0000 1011
0Bh
3
PW
Page write
0000 1010 0Ah
3
PP
Page program
0000 0010 02h
3
PE
SSE(1)
Page erase
Subsector erase
1101 1011 DBh
3
0010 0000 20h
3
SE
Sector erase
1101 1000 D8h
3
BE
Bulk erase
1100 0111 C7h
0
DP
Deep power-down
1011 1001 B9h
0
RDP
Release from deep
power-down
1010 1011 ABh
0
0
0
0
0
0
1 to 3
0
1 to ∞
0
1
0
1
0
1
0
1 to ∞
1
1 to ∞
0
1 to 256
0
1 to 256
0
0
0
0
0
0
0
0
0
0
0
0
1. Instruction available only in the T9HX process (see Important note on page 6).
6.1
Write enable (WREN)
The write enable (WREN) instruction (Figure 7) sets the write enable latch (WEL) bit.
The write enable latch (WEL) bit must be set prior to every page write (PW), page program
(PP), page erase (PE), sector erase (SE), bulk erase (BE) and write to lock register (WRLR)
instructions.
The write enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
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