LTC6912C-1 View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC6912C-1 Datasheet PDF : 24 Pages
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LTC6912
TYPICAL PERFOR A CE CHARACTERISTICS
LTC6912-2 Gain Shift vs
Temperature (Heavy Load)
0.25
VS = 5V
RL = 500
GAIN = 1
0
–0.25
GAIN = 8
–0.50
GAIN = 64
–0.75
–1.00
–50 –25
0 25 50 75
TEMPERATURE (°C)
100 125
6912 G26
PI FU CTIO S
INA, INB: Analog Inputs. The input signal to the A channel
amplifier of the LTC6912-X is the voltage difference be-
tween the INA pin and AGND pin. Likewise, the input signal
to the B channel amplifier of the LTC6912-X is the voltage
difference between the INB pin and AGND pin. The INA (or
INB) pin connects internally to a digitally controlled resis-
tance whose other end is a current summing point at the
same potential as the AGND pin (Figure 1). At unity gain,
the value of this input resistance is approximately 10kΩ
and the INA (or INB) pin voltage range is rail-to-rail (V+ to
V–). At gain settings above unity, the input resistance falls.
The linear input range at INA and INB also falls inversely
proportional to the programmed gain. Tables 1 and 2
summarize this behavior. The higher gains are designed to
boost lower level signals with good noise performance. In
the “zero” gain state (state = 0), or in software shutdown
(state = 8) analog switches disconnect the INA or INB pin
internally and this pin presents a very high input resis-
tance. In the “zero” gain state (state = 0), the input may
vary from rail to rail but the output is insensitive to it and
is forced to the AGND potential. Circuitry driving the INA
and INB pins must consider the LTC6912-X’s input resis-
tance, its process variance, and the variation of this
resistance from gain setting to gain setting. Signal sources
with significant output resistance may introduce a gain
error as the source’s output resistance and the LTC6912-
X’s input resistance forms a voltage divider. This is espe-
cially true at higher gain settings where the input resis-
tance is the lowest.
16
In single supply voltage applications, the LTC6912-X’s DC
ground reference for both input and output is AGND, not
V–. With increasing gains, the LTC6912-X’s input voltage
range for an unclipped output is no longer rail-to-rail but
diminishes inversely to gain, centered about the AGND
potential.
NC 1
INA 2
AGND 3
16 NC
INPUT R ARRAY
V+
100k
FEEDBACK R ARRAY
–
MOS INPUT
+
OP AMP
100k
MOS INPUT
OP AMP
+
–
V–
15 OUT A
14 V–
13 OUT B
INB 4
INPUT R ARRAY
CHANNEL A
FEEDBACK R ARRAY
CHANNEL B
12 V+
11 NC
LOWER
NIBBLE
8-BIT
LATCH
UPPER
NIBBLE
SHDN 5
CS/LD 6
DATA 7
CLK 8
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
8-BIT
SHIFT-REGISTER
Figure 1. GN-16 Block Diagram
10 DGND
V+
9 DOUT
6912 BD
6912fa
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