LTC3417AIFE(RevA) View Datasheet(PDF) - Linear Technology
Part Name
Description
MFG CO.
LTC3417AIFE Datasheet PDF : 20 Pages
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LTC3417A
APPLICATIO S I FOR ATIO
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high to
low again, a packet of charge moves from VIN to ground.
The resulting charge over the switching period is a current
out of VIN that is typically much larger than the DC bias
current. The gate charge losses are proportional to VIN and
thus their effects will be more pronounced at higher
supply voltages.
3) I2R losses are calculated from the DC resistances of the
internal switches, RSW, and the external inductor, RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the internal top
and bottom switches. Thus, the series resistance looking
into the SW pin is a function of both top and bottom
MOSFET RDS(ON) and the duty cycle (DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses:
I2R losses = IOUT2(RSW + RL)
where RL is the resistance of the inductor.
4) Other “hidden” losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important to
include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that CIN has adequate
charge storage and very low ESRCOUT at the switching
frequency. Other losses including diode conduction losses
during dead-time and inductor core losses generally ac-
count for less than 2% total additional loss.
Thermal Considerations
The LTC3417A requires the package Exposed Pad (PGND2/
GNDD pin) to be well soldered to the PC board. This gives
the DFN and TSSOP packages exceptional thermal prop-
erties, compared to similar packages of this size, making
it difficult in normal operation to exceed the maximum
junction temperature of the part. In a majority of applica-
tions, the LTC3417A does not dissipate much heat due to
its high efficiency. However, in applications where the
LTC3417A is running at high ambient temperature with
low supply voltage and high duty cycles, such as in
dropout, the heat dissipated may exceed the maximum
junction temperature of the part. If the junction tempera-
ture reaches approximately 150°C, both switches in both
regulators will be turned off and the SW nodes will become
high impedance.
To prevent the LTC3417A from exceeding its maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
TRISE = PD • θJA
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, TJ, is given by:
TJ = TRISE + TAMBIENT
As an example, consider the case when the LTC3417A is
in dropout in both regulators at an input voltage of 3.3V
with load currents of 1.5A and 1A. From the Typical
Performance Characteristics graph of Switch Resistance,
3417afa
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