LTC3417A
APPLICATIO S I FOR ATIO
The output capacitors need to be selected because of
various types and values determine the loop feedback
factor gain and phase. An output current pulse of 20% to
100% of full load current having a rise time of 1µs to 10µs
will produce output voltage and ITH pin waveforms that will
give a sense of overall loop stability without breaking the
feedback loop.
Switching regulators take several cycles to respond to a
step in load current. When a load step occurs, VOUT
immediately shifts by an amount equal to ∆ILOAD • ESRCOUT,
where ESRCOUT is the effective series resistance of COUT.
∆ILOAD also begins to charge or discharge COUT generat-
ing a feedback error signal used by the regulator to return
VOUT to its steady-state value. During this recovery time,
VOUT can be monitored for overshoot or ringing that would
indicate a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard second
order overshoot/DC ratio cannot be used to determine
phase margin. The gain of the loop increases with RITH and
the bandwidth of the loop increases with decreasing CITH.
If RITH is increased by the same factor that CITH is de-
creased, the zero frequency will be kept the same, thereby
keeping the phase the same in the most critical frequency
range of the feedback loop. In addition, feedforward ca-
pacitors, C1 and C2, can be added to improve the high
frequency response, as shown in Figure 4. Capacitor C1
provides phase lead by creating a high frequency zero with
R1 which improves the phase margin for the 1.5A SW1
channel. Capacitor C2 provides phase lead by creating a
high frequency zero with R3 which improves the phase
margin for the 1A SW2 channel.
The output voltage settling behavior is related to the
stability of the closed-loop system and will demonstrate
the actual overall supply performance. For a detailed
explanation of optimizing the compensation components,
including a review of control loop theory, refer to Linear
Technology Application Note 76.
Although a buck regulator is capable of providing the full
output current in dropout, it should be noted that as the
input voltage VIN drops toward VOUT, the load step capa-
bility does decrease due to the decreasing voltage across
the inductor. Applications that require large load step
capability near dropout should use a different topology
such as SEPIC, Zeta, or single inductor, positive buck
boost.
In some applications, a more severe transient can be
caused by switching in loads with large (>1µF) input
capacitors. The discharged input capacitors are effectively
put in parallel with COUT, causing a rapid drop in VOUT. No
regulator can deliver enough current to prevent this prob-
lem, if the switch connecting the load has low resistance
and is driven quickly. The solution is to limit the turn-on
speed of the load switch driver. A Hot SwapTM controller is
designed specifically for this purpose and usually incorpo-
rates current limiting, short-circuit protection, and soft-
starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100. It
is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can be
expressed as:
% Efficiency = 100% – (P1+ P2 + P3 +…)
where P1, P2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources account for most of the losses
in LTC3417A circuits: 1) LTC3417A IS current, 2) switch-
ing losses, 3) I2R losses, 4) other losses.
1) The IS current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
and control currents. IS current results in a small (< 0.1%)
loss that increases with VIN, even at no load.
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