CS8422 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS8422 Datasheet PDF : 82 Pages
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CS8422
1 - Received channel status block is in the professional format.
COPY - SCMS copyright indicator
0 - Copyright asserted.
1 - Copyright not asserted. If the category code is set to General in the incoming AES3 stream, copyright
will always be indicated by COPY, even when the stream indicates no copyright.
ORIG - SCMS generation indicator, decoded from the category code and the L bit.
0 - Received data is 1st generation or higher.
1 - Received data is original.
Note: COPY and ORIG will both be set to 1 if incoming data is flagged as professional or if the receiver
is not in use.
EMPH – Indicates if the input channel status data indicates that the incoming audio data has been pre-em-
phasized.
0 – 50 s/15 s pre-emphasis indicated.
1 – 50 s/15 s pre-emphasis not indicated.
11.18 Format Detect Status (12h)
7
6
5
PCM
IEC61937
DTS_LD
4
DTS_CD
3
HD_CD
2
DGTL_SIL
1
Reserved
0
Reserved
Note: PCM, DTS_LD, DTS_CD and IEC61937 are mutually exclusive. A ‘1’ indicated the condition
was detected.
PCM – Un-compressed PCM data was detected.
IEC61937 – IEC61937 data was detected.
DTS_LD – DTS_LD data was detected.
DTS_CD – DTS_CD data was detected.
HD_CD – HD_CD data was detected.
DGTL_SIL – Digital Silence was detected: at least 2047 consecutive constant samples of the same 24-bit
audio data on both channels.
11.19 Receiver Error (13h)
7
6
5
4
3
2
1
0
Reserved
QCRC
CCRC
UNLOCK
V
CONF
BIP
PAR
This register contains the AES3 receiver status bits. Unmasked bits will go high on occurrence of the error,
and will stay high until the register is read. Reading the register resets all bits to 0, unless the receiver error
interrupt mode is set to level active and the error source is still true. Bits that are masked off in the receiver
error mask register will always be 0 in this register.
QCRC - Q-subcode data CRC error indicator. Updated on Q-subcode block boundaries
0 - No error.
1 - Error.
58
DS692F1
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