CS8406-CSZ View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS8406-CSZ Datasheet PDF : 42 Pages
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CS8406
6.2 I²C Mode
In I²C Mode, SDA is a bidirectional data line. Data is clocked into and out of the part by the clock, SCL. There
is no CS pin. Pins AD0, AD1, and AD2 form the three least significant bits of the chip address and should
be connected to VL or GND as desired.
The signal timing for both a read and write cycle are shown in Figure 11 and Figure 12. A Start condition is
defined as a falling transition of SDA while the clock is high. A Stop condition is a rising transition while the
clock is high. All other transitions of SDA occur while the clock is low. The first byte sent to the CS8406 after
a Start condition consists of a 7 bit chip address field and a R/W bit (high for a read, low for a write). The
upper 4 bits of the 7-bit address field are fixed at 0010. To communicate with a CS8406, the chip address
field, which is the first byte sent to the CS8406, should match 0010 followed by the settings of the AD2, AD1,
and AD0 pins. The eighth bit of the address is the R/W bit. If the operation is a write, the next byte is the
Memory Address Pointer (MAP) which selects the register to be read or written. If the operation is a read,
the contents of the register pointed to by the MAP will be output. The MAP automatically increments, so
consecutive registers can read from or written to easily. Each byte is separated by an acknowledge bit
(ACK). The ACK bit is output from the CS8406 after each input byte is read, and is input to the CS8406 from
the microcontroller after each transmitted byte.
SCL
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 24 25 26 27 28
CHIP ADDRESS (WRITE)
MAP
DATA
DATA +1
SDA
0 0 1 0 AD2 AD1 AD0 0
ACK
START
654321
76
ACK
10
76
ACK
10
Figure 11. Control Port Timing, I²C Slave Mode Write
DATA +n
76 10
ACK
STOP
SCL
SDA
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
CHIP ADDRESS (WRITE)
0 0 1 0 AD2 AD1 AD0 0
ACK
START
MAP
STOP
CHIP ADDRESS (READ)
DATA
DATA +1 DATA + n
6 5 4 3210
0 0 1 0 AD2 AD1 AD0 1
70
70
70
ACK
START
ACK
ACK
NO
ACK STOP
Figure 12. Control Port Timing, I²C Slave Mode Read
Since the read operation cannot set the MAP, an aborted write operation is used as a preamble. As shown
in Figure 12, the write operation is aborted after the acknowledge for the MAP by sending a stop condition.
DS580F5
17
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