CS7620-IQ View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS7620-IQ

CCD Imager Analog Processor

Cirrus Logic 

CS7620

do not have to be reprogrammed at the next power

up.

3.8 Preview Mode

It is strongly recommend that the chip should be

kept in Stand By mode when not in use in order to

save power. When in preview mode, a user may

wish to cut down the resolution of the ADC output

to 6 bits in order to reduce the power consumption

of the CS7620. In this mode, the current is reduced

by 20 mA. With the DRX (Dynamic Range eXten-

sion) circuitry, 3 bits of dynamic range are added to

the 6-bit ADC output producing a 9-bit output. The

pins DOUT[12:4] are used to output the digitized

data in preview or Stand By mode.

3.9 Serial Interface

The serial interface is designed to allow high speed

input to control the chip’s registers. The specifica-

tions on this interface are as follows:

Asserting the enable pin, SEN, enables the serial

interface to perform data transfers. Data present on

the SDATI pin is latched into the CS7620 on each

rising edge of the serial clock, SCLK. Data output

on SDATO from the CS7620 is clocked out on the

rising edge of SCLK.

The CS7620 receives only the first 16 rising edges

of the SCLK while SEN is low and then ignores

any remaining SCLK and SDATI information. If

SEN goes high before 16 SCLK pulses have been

received, the CS7620 aborts the serial transfer.

The first bit is the R/W bit. R/W = 1 identifies the

transfer as a read. If (0), the transfer is a write. The

next seven bits define the address. For write trans-

fers, the second byte of the 16-bit packet contains

the data byte. For read transfers, the CS7620 out-

puts the read data on SDATO after accepting the

address. Address and data are transferred MSB

first. When not reading out data, the SDATO pin is

not driven by the chip (Hi-Z state).

The timing diagrams and specifications are shown

in “Serial Interface Timing Specifications” on

page 7 and Figures “SEN Timing”, “Read Data

Timing”, and “Serial Write Timing” on page 7.

3.10 Recommended Register Settings

These are the values that need to be written to the

registers to change the configuration of the CS7620

to work with each CCD in either low resolution or

high resolution mode. (2 × 2) refers to a RGRGRG

pattern and (3 × 4) refers to a RGBRGB pattern

CCD.

DS301PP2

21

Share Link: