CS5581(2007) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5581
(Rev.:2007)

±2.5 V / 5 V, 200 kSps, 16-bit, High-throughput ∆Σ ADC

Cirrus Logic 

8/21/07

15:56

CS5581

3.8 AIN & VREF Sampling Structures

The CS5581 uses on-chip buffers on the AIN, ACOM, and the VREF+ inputs. Buffers provide much higher

input impedance and therefore reduce the amount of drive current required from an external source. This

helps minimize errors.

The Buffer Enable (BUFEN) pin determines if the on-chip buffers are used or not. If the BUFEN pin is

connected to the V1+ supply the buffers will be enabled. If the BUFEN pin is connected to the V1- pin

the buffers are off. The converter will consume about 30 mW less power when the buffers are off, but the

input impedances of AIN, ACOM and VREF+ will be significantly less than with the buffers enabled.

3.9 Converter Performance

The CS5581 achieves excellent differential nonlinearity (DNL) as shown in Figures 8 and 9. Figure 8 il-

lustrates the code widths on the typical scale of ±1 LSB and on a zoomed scale of ±0.1 LSB. The DNL

error histogram in Figure 9 indicates that more than half the codes are accurate to better than ±0.01 LSB.

1.00

0.75

0.50

0.25

0.00

-0.25

-0.50

-0.75

-1.00

1

20

Codes

65535

0.10

0.08

0.06

0.04

0.02

0.00

-0.02

-0.04

-0.06

-0.08

-0.10

1

Codes

(Zoom View)

Figure 8. CS5581 DNL Plot

18000

16000

14000

12000

10000

8000

6000

4000

2000

0

DNL Error in LSBs

Figure 9. CS5581 DNL Histogram

65535

DS796A1

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