CS5376A(2004) View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5376A Datasheet PDF : 107 Pages
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CS5376A
Test Bit Stream Characteristic Equation:
(Signal Freq) * (# TBS Data) * (Interpolation + 1) = Output Rate
Example: (31.25 Hz) * (1024) * (0x07 + 1) = 256 kHz
Signal
Frequency
(TBSDATA)
10.00 Hz
10.00 Hz
25.00 Hz
25.00 Hz
31.25 Hz
31.25 Hz
50.00 Hz
50.00 Hz
125.00 Hz
125.00 Hz
Output
Rate
(TBSCLK)
256 kHz
512 kHz
256 kHz
512 kHz
256 kHz
512 kHz
256 kHz
512 kHz
256 kHz
512 kHz
Output Rate
Selection
(RATE)
0x4
0x5
0x4
0x5
0x4
0x5
0x4
0x5
0x4
0x5
Interpolation
Selection
(INTP)
0x18
0x31
0x09
0x13
0x07
0x0F
0x04
0x09
0x01
0x03
Table 16. TBS Configurations Using On-chip Data
Clock Delay - CDLY[2:0]
Programs a fractional delay for TBSCLK with a 1/8
clock period resolution.
Loopback - LOOP
Enables digital loopback from the TBS output to
the MDATA inputs.
Run - RUN
Enables the test bit stream generator.
Data Delay - DDLY[5:0]
Programs full period delays for TBSDATA, up to a
maximum of 63 bits.
Gain - TBSGAIN[23:0]
Scales the amplitude of the sine wave output and
generated impulse. Maximum 0x04FFFF, nominal
0x04B000.
17.4 TBS Data Source
Data to create test signals is loaded into digital fil-
ter memory by configuration commands. The on-
chip sine wave data is suitable for most tests,
though custom data is required to support custom
signal frequencies. See “EEPROM Configuration
Commands” on page 28 or “Microcontroller Con-
figuration Commands” on page 35 for information
about programming TBS data.
TBS ROM Data
An on-chip 24-bit 1024 point digital sine wave is
stored on the CS5376A. When selected by the
‘Write TBS ROM Data’ configuration command,
the TBS generator can produce the test signal fre-
quencies listed in Table 16. Additional discrete test
frequencies and output rates can be programmed
with the on-chip data by varying the interpolation
factor and output rate.
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