CS5376A(2004) View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5376A Datasheet PDF : 107 Pages
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CS5376A
Digital Filter
Data Bus
24-bit
TBSGAIN Register
24-bit
Digital ∆Σ Modulator
1-bit
TBSDATA
TBSCFG Register
Clock Generation
TBSCLK
Figure 36. Test Bit Stream Generator Block Diagram
17. TEST BIT STREAM GENERATOR
The CS5376A test bit stream (TBS) generator cre-
ates sine wave or impulse ∆Σ bit stream data to
drive an external test DAC. The TBS digital output
can also be internally connected to the MDATA in-
puts for loopback testing of the digital filter.
17.1 Pin Descriptions
TBSDATA - Pin 9
Test bit stream 1-bit ∆Σ data output.
TBSCLK - Pin 8
Test bit stream clock output. Not used by the
CS4373 test DAC.
17.2 TBS Architecture
The test bit stream generator consists of a data in-
terpolator and a digital ∆Σ modulator. It receives
periodic 24-bit data from the digital filter to create
a 1-bit ∆Σ data output on the TBSDATA pin. It also
creates a clock signal at the data rate, output to the
TBSCLK pin.
The TBS input data from the digital filter is scaled
by the TBSGAIN register (0x2B). Maximum stable
amplitude is 0x04FFFF, with 0x04B000 approxi-
mately full scale for the CS4373 test DAC. The full
scale 1-bit ∆Σ output from the TBS generator is de-
fined as 25% minimum and 75% maximum one’s
density.
17.3 TBS Configuration
Configuration options for the TBS generator are set
through the TBSCFG register (0x2A). Gain scaling
of the TBS generator output is set by the TBSGAIN
register (0x2B).
Interpolation Factor - INTP[7:0]
Selects how many times the interpolator uses a data
point when generating the output bit stream. Inter-
polation is zero based and represents one greater
than the programmed register value.
Operational Mode - TMODE
Selects between sine wave or impulse output mode.
Clock Rate - RATE[2:0]
Selects the TBSDATA and TBSCLK output rate.
Synchronization - TSYNC
Enables synchronization of the TBS output phase
to the MSYNC signal.
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