CS5461-IS View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CS5461-IS

Single Phase Bi-Directional Power/Energy IC

Cirrus Logic 

CS5461

6.1.7 Register Read/Write

B7 B6 B5 B4 B3 B2 B1 B0

0 W/R RA4 RA3 RA2 RA1 RA0 0

The Read/Write informs the state machine that a register access is required. During a read operation, the addressed

register is loaded into the device’s output buffer and clocked out by SCLK. During a write operation, the data is

clocked into the input buffer and, and all 24 bits are transferred to the addressed register on the 24th SCLK.

W/R

Write/Read control

0 = Read register

1 = Write register

RA[4:0]

Register address bits (bits 1 through 5) of the read/write command.

Address

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

RA[4-0]

00000

00001

00010

00011

00100

00101

00110

00111

01000

01001

01010

01011

01100

01101

01110

01111

10000

10001

10010

10011

10100

10101

10110

10111

11000

11001

11010

11011

11100

11101

11110

11111

Abbreviation

Config

IDCoff

Ign

VDCoff

Vgn

Cycle Count

PulseRateE

I

V

P

PAvg

IRMS

VRMS

TBC

Poff

Status

IACoff

VACoff

PulseRateF

T

Res

PW

Res

VSAGLevel

VSAGDuration

Res

Mask

Res

Ctrl

Res

Res

Res

Name/Description

Configuration Register

Current Offset Register

Current Gain Register

Voltage Offset Register

Voltage Gain Register

Number of A/D conversions used in one computation cycle (N)).

Sets the EOUT/EDIR energy-to-frequency output pulse rate.

Instantaneous Current Register (last current value)

Instantaneous Voltage Register (last voltage value)

Instantaneous Power Register (Last Power value)

Average Power Register (avg. power over last computation cycle)

RMS Current Register (RMS value over last comp. cycle)

RMS Voltage Register (RMS value over last comp. cycle)

Timebase Calibration Register

Power Offset Calibration Register

Status Register (Write of ‘1’ to status bit will clear the bit.)

AC (RMS) Current Offset Register

AC (RMS) Voltage Offset Register

Sets the FOUT power-to-frequency output pulse rate.

Temperature Register

Reserved †

Pulse width register for mechanical counter output mode

Reserved †

Voltage Sag Level Threshold Register.

Voltage Sag Duration Register.

Reserved †

Mask Register

Reserved †

Control Register

Reserved †

Reserved †

Reserved †

† These registers are for internal use only. For proper device operation, the user must not attempt to write

to these registers.

30

DS546F2

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