
CS5378
20.1.3 SPIDAT1 : 0x06, 0x07, 0x08
Figure 41. SPI Data Register SPIDAT1
(MSB) 23
SDAT23
R/W
0
22
SDAT22
R/W
0
21
SDAT21
R/W
0
20
SDAT20
R/W
0
19
SDAT19
R/W
0
18
SDAT18
R/W
0
17
SDAT17
R/W
0
16
SDAT16
R/W
0
15
SDAT15
R/W
0
14
SDAT14
R/W
0
13
SDAT13
R/W
0
12
SDAT12
R/W
0
11
SDAT11
R/W
0
10
SDAT10
R/W
0
9
SDAT9
R/W
0
8
SDAT8
R/W
0
7
SDAT7
R/W
0
6
SDAT6
R/W
0
5
SDAT5
R/W
0
4
SDAT4
R/W
0
3
SDAT3
R/W
0
2
SDAT2
R/W
0
1
SDAT1
R/W
0
(LSB) 0
SDAT0
R/W
0
SPI Address: 0x06
0x07
0x08
--
Not defined;
read as 0
R
Readable
W
Writable
R/W Readable and
Writable
Bits in bottom rows
are reset condition
Bit definitions:
23:16 SDAT[23:16] SPI Data
High Byte
15:8 SDAT[15:8] SPI Data
Middle Byte
15:8 SDAT[7:0] SPI Data
Low Byte
DS639F2
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