
CS5378
20.1.2 SPICMD : 0x03, 0x04, 0x05
Figure 40. SPI Command Register SPICMD
(MSB) 23
SCMD23
R/W
0
22
SCMD22
R/W
0
21
SCMD21
R/W
0
20
SCMD20
R/W
0
19
SCMD19
R/W
0
18
SCMD18
R/W
0
17
SCMD17
R/W
0
16
SCMD16
R/W
0
15
SCMD15
R/W
0
14
SCMD14
R/W
0
13
SCMD13
R/W
0
12
SCMD12
R/W
0
11
SCMD11
R/W
0
10
SCMD10
R/W
0
9
SCMD9
R/W
0
8
SCMD8
R/W
0
7
SCMD7
R/W
0
6
SCMD6
R/W
0
5
SCMD5
R/W
0
4
SCMD4
R/W
0
3
SCMD3
R/W
0
2
SCMD2
R/W
0
1
SCMD1
R/W
0
(LSB) 0
SCMD0
R/W
0
SPI Address: 0x03
0x04
0x05
--
Not defined;
read as 0
R
Readable
W
Writable
R/W Readable and
Writable
Bits in bottom rows
are reset condition
Bit definitions:
23:16 SCMD[23:16] SPI Command High 15:8 SCMD[15:8] SPI Command Mid- 15:8 SCMD[7:0] SPI Command
Byte
dle Byte
Low Byte
DS639F2
68