CDB5346 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CDB5346

103 dB, 192 kHz, Stereo Audio ADC with 6:1 Input Mux

Cirrus Logic 

CS5346

SWITCHING CHARACTERISTICS - CONTROL PORT - SPI FORMAT

Inputs: Logic 0 = DGND = AGND = 0 V, Logic 1 = VLC, CL = 30 pF.

Parameter

Symbol

Min

Max

CCLK Clock Frequency

RST Rising Edge to CS Falling

CS High Time Between Transmissions

CS Falling to CCLK Edge

CCLK Low Time

CCLK High Time

CDIN to CCLK Rising Setup Time

CCLK Rising to DATA Hold Time

CCLK Falling to CDOUT Stable

Rise Time of CDOUT

Fall Time of CDOUT

Rise Time of CCLK and CDIN

Fall Time of CCLK and CDIN

fsck

-

6.0

tsrs

500

-

tcsh

1.0

-

tcss

20

-

tscl

66

-

tsch

66

-

tdsu

40

-

(Note 18)

tdh

15

-

tpd

-

50

tr1

-

25

tf1

-

25

(Note 19)

tr2

-

100

(Note 19)

tf2

-

100

Units

MHz

ns

µs

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

18. Data must be held for sufficient time to bridge the transition time of CCLK.

19. For fsck <1 MHz.

RST

t srs

CS

t css

t scl t sch

t csh

CCLK

t r2

t f2

CDIN

CDOUT

t dsu

t dh

t pd

Figure 6. Control Port Timing - SPI Format

DS861PP1

19

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