CDB5346 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

MFG CO.

CDB5346

103 dB, 192 kHz, Stereo Audio ADC with 6:1 Input Mux

Cirrus Logic 

CS5346

SWITCHING CHARACTERISTICS - CONTROL PORT - I²C FORMAT

Inputs: Logic 0 = DGND = AGND = 0 V, Logic 1 = VLC, CL = 30 pF.

Parameter

Symbol

Min

Max

SCL Clock Frequency

fscl

-

RST Rising Edge to Start

tirs

500

Bus Free Time Between Transmissions

tbuf

4.7

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

Clock Low time

tlow

4.7

Clock High Time

thigh

4.0

Setup Time for Repeated Start Condition

tsust

4.7

SDA Hold Time from SCL Falling

(Note 17)

thdd

0

SDA Setup time to SCL Rising

tsud

250

Rise Time of SCL and SDA

trc, trd

-

Fall Time SCL and SDA

tfc, tfd

-

Setup Time for Stop Condition

tsusp

4.7

Acknowledge Delay from SCL Falling

tack

300

100

-

-

-

-

-

-

-

-

1

300

-

1000

Unit

kHz

ns

µs

µs

µs

µs

µs

µs

ns

µs

ns

µs

ns

17. Data must be held for sufficient time to bridge the transition time, tfc, of SCL.

RST

SDA

SCL

t irs

S to p

S ta rt

t buf

t hdst

t

lo w

t high

R epe ated

S ta rt

t rd

t hdst

t fc

t

hdd

t sud

t ack

t sust

t rc

Figure 5. Control Port Timing - I²C Format

S to p

t fd

t susp

18

DS861PP1

Share Link: