CS4525 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS4525 Datasheet PDF : 98 Pages
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6.6.3
CS4525
Right-Justified Data Format
In Right-Justified format, data is received most significant bit first and with the least significant bit present-
ed on the last SCLK before the LRCK transition and is valid on the rising edge of SCLK. For the Right-
Justified format, the left channel data is presented when LRCK is high and the right channel data is pre-
sented when LRCK is low. 16, 18, 20, and 24 bits per sample are supported.
LRCK
SCLK
Left Channel
Right Channel
SDIN
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Figure 32. Right-Justified Serial Audio Formats
6.7 Integrated VD Regulator
The CS4525 includes two internal linear regulators, one from the VD supply voltage to provide a fixed 2.5 V
supply to its internal digital blocks, and another from the VD supply voltage to provide a fixed 2.5 V supply
to its internal analog blocks. The LVD pin must be set to indicate the voltage present on the VD pin as shown
in Table 21 below.
VD
Connection
5 V Supply
3.3 V Supply
2.5 V Supply
VD_REG
Connection
Bypass Capacitors Only
Bypass Capacitors Only
VD and Bypass Capacitors
VA_REG
Connection
Bypass Capacitors Only
Bypass Capacitors Only
VD and Bypass Capacitors
LVD
Connection
VD
DGND
DGND
Table 21. Power Supply Configuration and Settings
SelectVD Bit Setting
Software Mode Only
‘1’ - Default
‘1’ - Default
‘0’
The output of the digital regulator is presented on the VD_REG pin and may be used to provide an external
device with up to 3 mA of current at its nominal output voltage of 2.5 V. The output of the analog regulator
is presented on the VA_REG pin and must only be connected to the bypass capacitors as shown in the typ-
ical connection diagrams.
If a nominal supply voltage of 2.5 V is used as the VD supply (see the Recommended Operating Conditions
table on page 18), the VD, VD_REG, and VA_REG pins must all be connected to the VD supply source. In
this configuration, the internal regulators are bypassed and the external supply source is used to directly
drive the internal digital and analog sections.
Referenced Control
Register Location
SelectVD ............................. “Select VD Level (SelectVD)” on page 88
DS726PP1
63
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