CS5397 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5397 Datasheet PDF : 40 Pages
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CS5396 CS5397
24-bit low-group-delay filter output will go through a high passfilter if “_hpen” bit in the Mode
register is ‘0’. If “_hpen” is ‘1’, data at the serial audio port will derive directly from the LGD filter
output.
If more than 1 bit is set for sdata2, low-group-delay filter output will be selected for output at the
port.
Test Mode 0(address 00000100)
7
6
5
4
3
2
1
0
aoverflow
doverflow
fir1_en
fir1(LRCK) _psydither
dstart1
dstart0
0
0
0
0
0
0
0
aoverflow
doverflow
fir1_en(sdata)
A ‘1’ indicates an overflow condition occurs in the modulator. This bit is reset by reading the
register.
A ‘1’ indicates an overflow condition occurs in the decimation filter. This bit is reset by reading
the register.
Default = ‘0’.
Test purpose only.
fir1L_R(fir1 L channel enable)
Default = ‘0’.
Test purpose only.
_psydither(psychoacoustic filter dither disable)
Default = ‘0’.
A ‘0’ means adding dither in the psychoacoustic filter.
dstart1, dstart2(dstart control bits)
Default = ‘00’.
Test purpose only.
Test Mode 1(add 00000101)
7
6
5
4
3
2
1
0
test mode. reserved for factory use only
FOR FACTORY USE ONLY
Chip Address (address 00000110)
7
6
5
4
3
2
1
0
caddr6
caddr5
caddr4
caddr3
caddr2
caddr1
caddr0
0
0
0
0
0
0
0
caddr(6-0) (chip address (bit6 to bit0))
Default = ‘0000000’.
This is used to store the programmable chip address for I2C and SPI mode.
When more than 1 device are connected to the I2C or SPI buses and using chip address is nec-
essary, chip address set up is done by:
1) Hold the SDATA1 pin of every chip to ‘1’ during power up.
DS229PP2
27
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