CS5397 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
CS5397 Datasheet PDF : 40 Pages
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CS5396 CS5397
HPEN (HP enable) Default = ‘0’.
The highpass filter will be disabled when _HPEN = ‘1’. The highpass filter will be automatically
enabled following calibration.
S/_M (Slave / Master mode) Default = ‘0’.
In master mode, LRCK, and SCLK are outputs. In slave mode, LRCK and SCLK are inputs.
This bit is ignored when sdata1 is used as input port in “fir2in” or “psychoin” mode (refer to Dig-
ital control & Tag register and Appendix B).
DFS (Digital Format Select)Default = ‘0’.
Output of serial data complies with I2S standard when DFS is 1.
Out-
put of serial data is Left Justified when DFS is 0.
MUTE
Default = ‘0’.
Data at SDATA1 and SDATA2 is always ‘0’ when this set to ‘1’.
Audio port (address 00000011)
7
24bit
(sdata1)
1
6
24bit
(sdata2)
0
5
psycho
(sdata1)
0
4
psycho
(sdata2)
0
3
psel18/_16
0
2
psel20/_16
0
1
lgd
(sdata1)
0
0
lgd
(sdata2)
1
24bit(SDATA1)
Default = ‘1’.
A ‘1’ enables the serial audio port 1 to transmit the 24-bit high precision output.
This bit must be set to ‘0’ to enable other SDATA1 output options.
24bit(SDATA2)
Default = ‘0’.
A ‘1’ enables the serial audio port 2 to transmit 24-bit high precision output. This bit must be set
to ‘0’ to enable other SDATA2 output options.
psycho(SDATA1) Default = ‘0’.
psychoacoustic output will be the data at the serial audio port 1 if this bit is ‘1’ and all other bits
of the port are set to ‘0’.
psycho(SDATA2) Default = ‘0’.
psychoacoustic output will be the data at the serial audio port 2 if this bit is ‘1’ and all other bits
of the port are set to ‘0’.
psel18/_16(Psycho 18bit or 16bit)
Default = ‘0’.
This bit indicates the number of output bit if the psychoacoustic filter is chosen as output. A ‘0’
here allows 16 bits output whereas a ‘1’ allows 18 bits output as long as “psel20/_16” is ‘0’.
psel20/_16(Psycho 20bit)
Default = ‘0’.
This bit has the highest priority when setting the number of output bit of psychoacoustic filter. If
this bit is ‘1’, the output is set to 20-bit regardless of the status of “psel18/_16”.
LGD(sdata1)
Default = ‘0’.
24-bit low-group-delay filter output will go through a highpass filter if “_hpen” bit in the Mode
register is ‘0’. The LGD output will be the data at the serial audio port 1 if this bit is ‘1’ and all
other bits of the port set to ‘0’.
LGD(sdata2)
Default = ‘1’.
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DS229PP2
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