C8051F91X-C8051F90X View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

MFG CO.

C8051F91X-C8051F90X

Single/Dual Battery, 0.9–3.6 V, 16–8 kB, SmaRTClock, 12/10-Bit ADC MCU

Silicon Laboratories 

C8051F91x-C8051F90x

15. Cyclic Redundancy Check Unit (CRC0)

C8051F91x-C8051F90x devices include a cyclic redundancy check unit (CRC0) that can perform a CRC

using a 16-bit or 32-bit polynomial. CRC0 accepts a stream of 8-bit data written to the CRC0IN register.

CRC0 posts the 16-bit or 32-bit result to an internal register. The internal result register may be accessed

indirectly using the CRC0PNT bits and CRC0DAT register, as shown in Figure 15.1. CRC0 also has a bit

reverse register for quick data manipulation.

CRC0IN

8

8 Automatic CRC

Controller

Flash

Memory

CRC0SEL

CRC0INIT

CRC0VAL

CRC0PNT1

CRC0PNT0

CRC0FLIP

Write

CRC Engine

32

RESULT

8

88

8

CRC0AUTO

CRC0CNT

4 to 1 MUX

CRC0FLIP

Read

8

CRC0DAT

Figure 15.1. CRC0 Block Diagram

15.1. CRC Algorithm

The C8051F91x-C8051F90x CRC unit generates a CRC result equivalent to the following algorithm:

1. XOR the input with the most-significant bits of the current CRC result. If this is the first iteration

of the CRC unit, the current CRC result will be the set initial value 

(0x00000000 or 0xFFFFFFFF).

2a. If the MSB of the CRC result is set, shift the CRC result and XOR the result with the selected

polynomial.

2b. If the MSB of the CRC result is not set, shift the CRC result.

Repeat Steps 2a/2b for the number of input bits (8). The algorithm is also described in the following

example.

The 16-bit C8051F91x-C8051F90x CRC algorithm can be described by the following code:

unsigned short UpdateCRC (unsigned short CRC_acc, unsigned char CRC_input)

{

unsigned char i;

// loop counter

#define POLY 0x1021

// Create the CRC "dividend" for polynomial arithmetic (binary arithmetic

152

Rev. 1.0

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