C8051T603-GS(2007) View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051T603-GS Datasheet PDF : 168 Pages
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C8051T600/1/2/3/4/5
4. Pinout and Package Definitions
Table 4.1. Pin Definitions for the C8051T600/1/2/3/4/5
Pin Number Pin Number
QFN-11 SOIC-14
Name
Type
1
5
VREF / A In
Description
External Voltage Reference Input.
P0.0 D I/O or A In Port 0.0. See Section 13 for complete description.
2
6
P0.1 D I/O or A In Port 0.1. See Section 13 for complete description.
3
7
VDD
Power Supply Voltage.
4
8
VPP / A In
VPP Programming Supply Voltage
P0.2 D I/O or A In Port 0.2. See Section 13 for complete description.
5
10
EXTCLK/ D I/O or A I/O This pin can be used as the external clock input for
CMOS, RC, or Capacitor configurations. See Sec-
tion 12.2.
P0.3 D I/O or A In Port 0.3. See Section 13 for complete description.
6
12
P0.4 D I/O or A In Port 0.4. See Section 13 for complete description.
7
13
P0.5 D I/O or A In Port 0.5. See Section 13 for complete description.
8
14
C2CK / D I/O
Clock signal for the C2 Development Interface.
RST D I/O
Device Reset. Open-drain output of internal POR
or VDD monitor. An external source can initiate a
system reset by driving this pin low for at least 10
µs.
9
1
P0.6 D I/O or A In Port 0.6. See Section 13 for complete description.
10
2
C2D / D I/O
Data signal for the C2 Development Interface.
P0.7 D I/O or A In Port 0.7. See Section 13 for complete description.
11
3
GND
Ground.
—
4, 9, 11
NC
No Connection
26
Rev. 0.5
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