C8051F38C-GMR View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F38C-GMR Datasheet PDF : 321 Pages
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C8051F380/1/2/3/4/5/6/7/C
USB Register Definition 21.21. EINCSRH: USB0 IN Endpoint Control High
Bit
7
6
5
4
3
2
1
0
Name DBIEN
ISO
DIRSEL
FCDT
SPLIT
Type R/W
R/W
R/W
R
R/W
R/W
R
R
Reset
0
0
0
0
0
0
0
0
USB Register Address = 0x12
Bit Name
Function
7 DBIEN IN Endpoint Double-buffer Enable.
0: Double-buffering disabled for the selected IN endpoint.
1: Double-buffering enabled for the selected IN endpoint.
6
ISO Isochronous Transfer Enable.
This bit enables/disables isochronous transfers on the current endpoint.
0: Endpoint configured for bulk/interrupt transfers.
1: Endpoint configured for isochronous transfers.
5 DIRSEL Endpoint Direction Select.
This bit is valid only when the selected FIFO is not split (SPLIT = 0).
0: Endpoint direction selected as OUT.
1: Endpoint direction selected as IN.
4 Unused Read = 0b. Write = don’t care.
3 FCDT Force Data Toggle Bit.
0: Endpoint data toggle switches only when an ACK is received following a data packet
transmission.
1: Endpoint data toggle forced to switch after every data packet is transmitted, regard-
less of ACK reception.
2 SPLIT FIFO Split Enable.
When SPLIT = 1, the selected endpoint FIFO is split. The upper half of the selected
FIFO is used by the IN endpoint; the lower half of the selected FIFO is used by the OUT
endpoint.
1:0 Unused Read = 00b. Write = don’t care.
200
Rev. 1.4
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