C8051F362-GM2 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F362-GM2 Datasheet PDF : 288 Pages
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C8051F360/1/2/3/4/5/6/7/8/9
SFR Definition 16.2. OSCICN: Internal Oscillator Control
SFR Page: F
SFR Address: 0xB7
R/W
R
IOSCEN IFRDY
Bit7
Bit6
R/W
R
R/W
R/W
SUSPEND Reserved Reserved Reserved
Bit5
Bit4
Bit3
Bit2
R/W
IFCN1
Bit1
R/W
IFCN0
Bit0
Reset Value
11000000
Bit 7: IOSCEN: Internal Oscillator Enable Bit.
0: Internal Oscillator Disabled.
1: Internal Oscillator Enabled.
Bit 6: IFRDY: Internal Oscillator Frequency Ready Flag.
0: Internal Oscillator not running at programmed frequency.
1: Internal Oscillator running at programmed frequency.
Bits 5: SUSPEND: Internal Oscillator Suspend Enable Bit.
Setting this bit to logic ‘1’ places the internal oscillator in SUSPEND mode. The internal
oscillator resumes operation when one of the SUSPEND mode awakening events occur.
Bits 4–2: RESERVED. Read = 000b. Must Write 000b.
Bits 1–0: IFCN1-0: Internal Oscillator Frequency Control Bits.
00: Internal Oscillator is divided by 8. (default)
01: Internal Oscillator is divided by 4.
10: Internal Oscillator is divided by 2.
11: Internal Oscillator is divided by 1.
Table 16.1. Internal High Frequency Oscillator Electrical Characteristics
–40°C to +85°C unless otherwise specified.
Parameter
Conditions
Calibrated Internal Oscillator
Frequency
Internal Oscillator Supply
Current (from VDD)
OSCICN.7 = 1
Power Supply Sensitivity
Constant Temperature
Temperature Sensitivity
Constant Supply
External Clock Frequency
TXCH (External Clock High Time)
TXCL (External Clock Low Time)
Min
Typ
Max
24
24.5
25
—
450
600
—
0.12
—
—
60
—
0
—
30
15
—
—
15
—
—
Units
MHz
µA
%/V
ppm/°C
MHz
ns
ns
16.2. Programmable Internal Low-Frequency (L-F) Oscillator
All C8051F36x devices include a programmable low-frequency internal oscillator, which is calibrated to a
nominal frequency of 80 kHz. The low-frequency oscillator circuit includes a divider that can be changed to
divide the clock by 1, 2, 4, or 8, using the OSCLD bits in the OSCLCN register (see SFR Definition 16.3).
Additionally, the OSCLF bits (OSCLCN5:2) can be used to adjust the oscillator’s output frequency.
Rev. 1.0
171
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