C8051F362-GM2 View Datasheet(PDF) - Silicon Laboratories
Part Name
Description
MFG CO.
C8051F362-GM2 Datasheet PDF : 288 Pages
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C8051F360/1/2/3/4/5/6/7/8/9
Table 15.2. AC Parameters for External Memory Interface
Parameter
Description
Min*
TACS
Address/Control Setup Time
0
TACW
Address/Control Pulse Width
1 x TSYSCLK
TACH
Address/Control Hold Time
0
TALEH
Address Latch Enable High Time
1 x TSYSCLK
TALEL
Address Latch Enable Low Time
1 x TSYSCLK
TWDS
Write Data Setup Time
1 x TSYSCLK
TWDH
Write Data Hold Time
0
TRDS
Read Data Setup Time
20
TRDH
Read Data Hold Time
0
*Note: TSYSCLK is equal to one period of the device system clock (SYSCLK).
Max*
Units
3 x TSYSCLK
ns
16 x TSYSCLK ns
3 x TSYSCLK
ns
4 x TSYSCLK
ns
4 x TSYSCLK
ns
19 x TSYSCLK ns
3 x TSYSCLK
ns
ns
ns
168
Rev. 1.0
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