PIN DESCRIPTION
Table 2-2. Definition of Signal Pins
Signal Name Dir Buffer Type1
Description
Qty
GPIO SIGNALS
GPIO[15:0]
I/O BD4STRP_FT
General Purpose IOs
16
JTAG
TCLK
I TLCHT_FT
Test Clock
1
TRST
I TLCHT_FT
Test Reset
1
TDI
I TLCHTD_FT
Test Data Input
TMS
I TLCHT_FT
Test Mode Set
1
TDO
O BT8TRP_TC
Test Data output
1
MISCELLANEOUS
SCAN_ENABLE
I TLCHTD_FT
Test Pin - Reserved
1
SPKRD
O BD4STRP_FT
Speaker Device Output
1
Note1; See Table 2-3 for buffer type descriptions
Buffer
ANA
OSCI13B
Table 2-3. Buffer Type Descriptions
Analog pad buffer
Oscillator, 13 MHz, HCMOS
Description
BT4CRP
BT8TRP_TC
LVTTL Output, 4 mA drive capability, Tri-State Control
LVTTL Output, 8 mA drive capability, Tri-State Control, Schmitt trigger
BD4STRP_FT
BD4STRUP_FT
BD4STRP_TC
BD8STRP_FT
BD8STRUP_FT
BD8STRP_TC
BD8TRP_TC
BD8PCIARP_FT
BD14STARP_FT
BD16STARUQP_TC
LVTTL Bi-Directional, 4 mA drive capability, Schmitt trigger, 5V tolerant
LVTTL Bi-Directional, 4 mA drive capability, Schmitt trigger, Pull-Up, 5V tolerant
LVTTL Bi-Directional, 4 mA drive capability, Schmitt trigger
LVTTL Bi-Directional, 8 mA drive capability, Schmitt trigger, 5V tolerant
LVTTL Bi-Directional, 8 mA drive capability, Schmitt trigger, Pull-Up, 5V tolerant
LVTTL Bi-Directional, 8 mA drive capability, Schmitt trigger
LVTTL Bi-Directional, 8 mA drive capability, Schmitt trigger
LVTTL Bi-Directional, 8 mA drive capability, PCI compatible, 5V tolerant
LVTTL Bi-Directional, 14 mA drive capability, Schmitt trigger, IEEE1284 compliant, 5V tolerant
LVTTL Bi-Directional, 16 mA drive capability, Schmitt trigger
SCHMITT_FT
TLCHT_FT
TLCHT_TC
TLCHTD_TC
TLCHTU_TC
LVTTL Input, Schmitt trigger, 5V tolerant
LVTTL Input, 5V tolerant
LVTTL Input
LVTTL Input, Pull-Down
LVTTL Input, Pull-Up
USBDS_2V5
USB 1.1 compliant pad buffer
VDDCO
Analog output pad
18/111
Issue 1.0 - July 24, 2002