STPCI2GDYI(2002) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STPCI2GDYI Datasheet PDF : 111 Pages
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PIN DESCRIPTION
2. PIN DESCRIPTION
2.1. INTRODUCTION
The STPC Atlas integrates most of the
functionalities of the PC architecture. Therefore,
many of the traditional interconnections between
the host PC microprocessor and the peripheral
devices are totally internal to the STPC Atlas. This
offers improved performance due to the tight
coupling of the processor core and it’s peripherals.
As a result many of the external pin connections
are made directly to the on-chip peripheral
functions.
Table 2-1 describes the physical implementation
listing signal types and their functionalities. Table
2-2 provides a full pin listing and description.
Table 2-6 provides a full listing of the STPC Atlas
package pin location physical connection. Please
refer to the pin allocation drawing for reference.
Due to the number of pins available for the
package, and the number of functional I/Os, some
pins have several functions, selectable by strap
option on Reset. Table 2-4 provides a summary of
these pins and their functions.
Non multi-functional pins associated with a
particular function are not available for use
elsewhere when that function is disabled. For
example, when in the ISA mode, the Local Bus is
disabled totally and Local Bus pins are set to the
tri-state (high-impedance) condition.
Table 2-1. Signal Description
Group name
Basic Clocks, Reset & Xtal (SYS)
SDRAM Controller (SDRAM)
PCI Controller
ISA Controller
Local Bus I/F
PCMCIA Controller
IDE Controller
VGA Controller (VGA) / I2C
Video Input Port
TFT output
USB Controller
Serial Interface
Keyboard/Mouse Controller
Parallel Port
GPIO Signals
JTAG Signals
Miscellaneous
Grounds
VDD 3.3 V/2.5 V
Reserved
Total Pin Count
Qty
19
95
51
80
67
62
100
34
10
11
24
6
16
4
18
16
5
5
96
36
4
516
Issue 1.0 - July 24, 2002
13/111
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