CS61880
16.3 Device ID Register (IDR)
Revision section: 0h = Rev A, 1h = Rev B and so on. The device Identification Code [27 - 12] is derived
from the last three digits of the part number (880). The LSB is a constant 1, as defined by IEEE 1149.1.
CS61880 IDCODE REGISTER(IDR)
REVISION
DEVICE IDCODE REGISTER
MANUFACTURER CODE
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0h
0h
8h
8h
0h
0h
0h
9h
0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0011001001
17. BOUNDARY SCAN REGISTER (BSR)
The BSR is a shift register that provides access to the digital I/O pins. The BSR is used to read and write
the device pins to verify interchip connectivity. Each pin has a corresponding scan cell in the register. The
pin to scan cell mapping is given in the Boundary Scan Register description shown in Table 14.
NOTE: Data is shifted LSB first into the BSR register.
BSR
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Table 14. Boundary Scan Register
Pin
Name
LOS7
RNEG7
RPOS7
RCLK7
-
TNEG7
TPOS7
TCLK7
LOS6
RNEG6
RPOS6
RCLK6
-
TNEG6
TPOS6
TCLK6
MCLK
MODE
MODE
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
LOOP0/D0
LOOP0/D0
LOOP0/D0
LOOP1/D1
Cell
Type
O
O
O
O
Note 2
I
I
I
O
O
O
O
Note 2
I
I
I
I
I
I
I
I
I
I
I
I
I
O
I
Bit
Symbol
LOS7
RNEG7
RPOS7
RCLK7
HIZ7_B
TNEG7
TPOS7
TCLK7
LOS6_B
RNEG6
RPOS6
RCLK6
HIZ6_B
TNEG6
TPOS6
TCLK6
MCLK
MODE_TRI
MODE_IN
ADDR4
ADDR3
ADDR2
ADDR1
ADDR0
LPT0
LPI0
LPO0
LPT1
DS450PP2
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