CS493302-IL 查看數據表（PDF） - Cirrus Logic

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CS493302-IL

Multi-Standard Audio Decoder Family

Cirrus Logic 

CS49300 Family DSP

CMPDATA:

A[1:0]==11b.

The host indicates that this is a write cycle

by driving the R/W pin low.

2) The host initiates a write cycle by driving the

CS and DS pins low.

3) The host drives the data byte to the DATA[7:0]

pins of the CS493XX.

4) Once the setup time for the write has been met,

the host ends the write cycle by driving the CS

and DS pins high.

6.2.2.2. Reading a Byte in Motorola Mode

The flow diagram shown in Figure 27 illustrates the

sequence of events that define a one-byte read in

Motorola mode. The protocol presented Figure 27

will now be described in detail.

1) The host must drive the A1 and A0 register

address pins of the CS493XX with the address

of the desired Parallel I/O Register. Note that

only the Host Message register and the Host

Control register can be read.

Host Message:

A[1:0]==00b.

Host Control:

A[1:0]==01b.

The host indicates that this is a read cycle

by driving the R/W pin high.

2) The host initiates the read cycle by driving the

CS and DS pins low.

3) Once the data is valid, the host can read the

value of the selected register from the

DATA[7:0] pins of the CS493XX.

4) The host should now terminate the read cycle

by driving the CS and DS pins high.

6.2.3. Procedures for Parallel Host

Mode Communication

6.2.3.1. Control Write in a Parallel Host

Mode

When writing control data to the CS493XX, the

same protocol is used whether the host is writing a

control message or an entire executable download

image. Messages sent to the CS493XX should be

written most significant byte first. Likewise,

downloads of the application code should also be

performed most significant byte first.

The example shown in this section can be

generalized to fit any control write situation. The

generic function ‘Read_Byte_*()’ is used in the

following example as a generalized reference to

R/W (LOW)

ADDRESS A PARALLEL I/O REGISTER

(A[1:0] SET APPROPRIATELY

R/W (HIGH)

ADDRESS A PARALLEL I/O REGISTER

(A[1:0] SET APPROPRIATELY

CS (LOW)

DS (LOW)

CS (LOW)

DS (LOW)

WRITE BYTE TO

DATA [7:0]

READ BYTE FROM

DATA [7:0]

CS (HIGH)

DS (HIGH)

Figure 26. Motorola Mode, One-Byte Write Flow

Diagram

48

CS (HIGH)

DS (HIGH)

Figure 27. Motorola Mode, One-Byte Read Flow

Diagram

DS339F7

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