CS8900-CQ 查看數據表（PDF） - Cirrus Logic

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CS8900-CQ

Highly-Integrated ISA Ethernet Controller

Cirrus Logic 

CS8900

Register 3: Receiver Configuration (RxCFG, Read/Write)

Address: PacketPage base + 0102h

F

E

D

C

B

A

9

8

7

6

5-0

Extra

dataiE

RuntiE

CRC

erroriE

Buffer

CRC

AutoRx

DMAE

RxDMA RxOKiE StreamE Skip_1

only

000011

RxCFG determines how frames will be transferred to the host and what frame types will cause interrupts.

BIT NAME

DESCRIPTION

5-0 000011

These bits provide an internal address used by the CS8900 to identify this as the

Receiver Configuration Register. To write to this register, these bits must be 000011,

where the LSB corresponds to Bit 0.

6

Skip_1

When set, this bit causes the last committed received frame to be deleted from the

receive buffer. To skip another frame, the host must re-write a "1" to this bit. This bit is

not to be used if RxDMAonly (Bit 9) is set. Skip_1 is an Act-Once bit. See Section 5.2.5

7

StreamE

When set, StreamTransfer mode is used to transfer receive frames that are back-to-

back and that pass the Destination Address filter (see Section 5.3). When StreamE is

clear, StreamTransfer mode is not used. This bit must not be set unless either bit

AutoRXDMA or bit RXDMA-only is set.

8

RxOKiE

When set, there is an RxOK Interrupt if a frame is received without errors.

9

RxDMAonly

The Receive-DMA mode is used for all receive frames when this bit is set.

A

AutoRxDMAE When set, the CS8900 will automatically switch to Receive-DMA mode if the conditions

specified in Section 5.5 are met. RxDMAonly (Bit 9) has precedence over

AutoRxDMAE.

B

BufferCRC

When set, the received CRC is included with the data stored in the receive-frame

buffer, and the four CRC bytes are included in the receive-frame length (PacketPage

base + 0402h). When clear, neither the receive buffer nor the receive length include the

CRC.

C

CRCerroriE

When set, there is a CRCerror Interrupt if a frame is received with a bad CRC.

D RuntiE

When set, there is a Runt Interrupt if a frame is received that is shorter than 64 bytes.

The CS8900 always discards any frame that is shorter than 8 bytes.

E

ExtradataiE

When set, there is an Extradata Interrupt if a frame is received that is longer than 1518

bytes. The operation of this bit is independent of the received packet integrity (good or

bad CRC).

After reset, if no EEPROM is found by the CS8900, then the register has the following initial state. If an

EEPROM is found, then the register’s initial value may be set by the EEPROM. See Section 3.3.

0000 0000 0000 0011

DS150PP2

49

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