CS5374 查看數據表（PDF） - Cirrus Logic

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CS5374

Dual High-performance Amplifier & ΔΣ Modulator

Cirrus Logic 

CS5374

DS862F1

CS5374

Name

VERSION

AMP1CFG

AMP2CFG

ADCCFG

PWRCFG

Addr.

0x00

0x01

0x02

0x03

0x04

Type

R

R/W

R/W

R/W

R/W

# Bits

8

8

8

8

8

Description

Device Version ID

Amplifier 1 configuration

Amplifier 2 configuration

Modulator 1 & 2 configuration

Power configuration

Table 2. SPI Configuration Registers

5.3 SPI Registers

The CS5374 SPI registers are 8-bit registers that

control the CS5374 hardware configuration. See

“SPITM Register Summary” on page 34 for de-

tailed bit definitions of the SPI registers listed in

Table 2.

5.3.1 VERSION — 0x00

The VERSION register indicates the hardware re-

vision of the CS5374 device. Read only.

 Reset Condition : 0000_0001

 Normal Operation : 0000_0001

 Power Down Operation : 0000_0001

5.3.2 AMP1CFG — 0x01

The AMP1CFG register controls the amplifier

MUX and GAIN settings for channel 1. It also en-

ables PWDN mode for the channel 1 amplifier plus

enables the GUARD output for channels 1 & 2.

 Reset Condition : 0000_0000

 Normal Operation : 00MM_0GGG

 Power Down Operation : 1000_0000

5.3.3 AMP2CFG — 0x02

The AMP2CFG register controls the amplifier

MUX and GAIN settings for channel 2. It also en-

ables PWDN mode for the channel 2 amplifier.

 Reset Condition : 0000_0000

 Normal Operation : 00MM_0GGG

 Power Down Operation : 1000_0000

Input Selection

800 Ω termination

INA only

INB only

INA + INB

MUX1

0

1

0

1

MUX0

0

0

1

1

Gain Selection

1x

2x

4x

8x

16x

32x

64x

reserved

GAIN2

0

0

0

0

1

1

1

1

GAIN1

0

0

1

1

0

0

1

1

GAIN0

0

1

0

1

0

1

0

1

Table 3. Digital Selections for Gain and Input Mux Control

DS862F1

23

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