AT89C51CC03C-RLTIM 查看數據表（PDF） - Atmel Corporation

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AT89C51CC03C-RLTIM

Enhanced 8-bit MCU with CAN Controller and Flash Memory

Atmel Corporation 

Hardware Security Byte

Table 24. Hardware Security Byte

7

6

5

4

X2B

BLJB

-

-

3

2

1

0

-

LB2

LB1

LB0

Bit

Bit

Number Mnemonic Description

X2 Bit

7

X2B Set this bit to start in standard mode

Clear this bit to start in X2 mode.

Boot Loader JumpBit

6

BLJB - 1: To start the user’s application on next RESET (@0000h) located in FM0,

- 0: To start the boot loader(@F800h) located in FM1.

5-3

-

Reserved

The value read from these bits are indeterminate.

2-0

LB2:0 Lock Bits

After erasing the chip in parallel mode, the default value is : FFh

The erasing in ISP mode (from bootloader) does not modify this byte.

Notes: 1. Only the 4 MSB bits can be accessed by software.

2. The 4 LSB bits can only be accessed by parallel mode.

62 AT89C51CC03

4182K–CAN–05/06

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