AT89C51CC03C-RLTIM 查看數據表（PDF） - Atmel Corporation

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AT89C51CC03C-RLTIM

Enhanced 8-bit MCU with CAN Controller and Flash Memory

Atmel Corporation 

Registers

AT89C51CC03

Table 10. PCON Register

PCON (S87:h) Power configuration Register

7

6

5

4

3

2

1

0

-

-

-

-

GF1

GF0

PD

IDL

Bit

Number

7-4

Bit

Mnemonic Description

-

Reserved

The value read from these bits is indeterminate. Do not set these bits.

General Purpose flag 1

3

GF1 One use is to indicate whether an interrupt occurred during normal operation or

during Idle mode.

General Purpose flag 0

2

GF0 One use is to indicate whether an interrupt occurred during normal operation or

during Idle mode.

Power-Down Mode bit

1

PD

Cleared by hardware when an interrupt or reset occurs.

Set to activate the Power-Down mode.

If IDL and PD are both set, PD takes precedence.

Idle Mode bit

0

IDL

Cleared by hardware when an interrupt or reset occurs.

Set to activate the Idle mode.

If IDL and PD are both set, PD takes precedence.

Reset Value= XXXX 0000b

37

4182K–CAN–05/06

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