
AT89C51CC03
Figure 5. Clock CPU Generation Diagram
X2B
Hardware byte On RESET
X2
CKCON.0
PCON.0
IDL
XTAL1
XTAL2
÷2
0
1
CPU Core
Clock
CPU
CLOCK
PD
PCON.1
CPU Core Clock Symbol
and ADC
÷2
1
0
÷2
1
0
÷2
1
0
÷2
1
0
÷2
1
0
÷2
1
0
÷2
1
0
FT0 Clock
FT1 Clock
FT2 Clock
FUart Clock
FPca Clock
FWd Clock
FCan Clock
÷2
1
0
FSPIClock
X2
CKCON.0
PERIPH
CLOCK
SPIX2 CANX2 WDX2 PCAX2 SIX2 T2X2 T1X2 T0X2
Peripheral
CKCON1.0 CKCON0.7 CKCON0.6 CKCON0.5 CKCON0.4 CKCON0.3 CKCON0.2 CKCON0.1 Clock Symbol
19
4182K–CAN–05/06