AT89C51CC03C-RLTIM 查看數據表（PDF） - Atmel Corporation

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AT89C51CC03C-RLTIM

Enhanced 8-bit MCU with CAN Controller and Flash Memory

Atmel Corporation 

PCA Registers

Table 95. CMOD Register

CMOD (S:D9h)

PCA Counter Mode Register

7

6

5

4

CIDL

WDTE

-

-

3

2

1

0

-

CPS1

CPS0

ECF

Bit

Bit

Number Mnemonic Description

PCA Counter Idle Control bit

7

CIDL Clear to let the PCA run during Idle mode.

Set to stop the PCA when Idle mode is invoked.

WatchDog Timer Enable

6

WDTE Clear to disable WatchDog Timer function on PCA Module 4,

Set to enable it.

5

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

4

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

3

-

Reserved

The value read from this bit is indeterminate. Do not set this bit.

EWC Count Pulse Select bits

CPS1 CPS0 Clock source

2

CPS1

0

0

0

Internal Clock, FPca/6

1

Internal Clock, FPca/2

1

0

Timer 0 overflow

1

1

External clock at ECI/P1.2 pin (Max. Rate = FPca/4)

1

CPS0

Reserved

The value read from this bit is indeterminate. Do not set this bit.

Enable PCA Counter Overflow Interrupt bit

0

ECF Clear to disable CF bit in CCON register to generate an interrupt.

Set to enable CF bit in CCON register to generate an interrupt.

Reset Value = 00XX X000b

148 AT89C51CC03

4182K–CAN–05/06

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