QL82SD 查看數據表（PDF） - QuickLogic Corporation

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QL82SD

LVDS SERDES, flexible programmable logic, dual port SRAM.

QuickLogic Corporation 

QL82SD Device Data Sheet Rev C

Clock AC Characteristics at VCC = 2.5 V, TA = 25 oC (K = 1)

programmable clock

Global Clock Buffer

Hardware Clock

Global Clock

tPGCK

Logic Cells

I/Os

Skew

tBGCK

Figure 34: Clock Structure

Table 22: Clock Performance

Clock Performance

Global

Dedicated

1.51 ns

1.59 ns

2.06 ns

1.73 ns

0.55 ns

0.14 ns

Symbol

Input Register Cell Only

tPGCK

tBGCK

Table 23: Input Register Cell

Parameter

Propagation Delay (ns)

Global clock pin delay to quad net

Global clock buffer delay (quad net to flip

flop)

1.34

0.56

I/O AC Characteristics at VCC = 2.5 V, TA = 25 oC (K = 1)

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24

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www.quicklogic.com

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Figure 35: I/O Structure

Preliminary

© 2002 QuickLogic Corporation

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